1. Field of the Invention
The present invention generally relates to a bipolar current sensing device having increased gain and low input impedance.
2. Description of the Related Art
Conventional systems utilize current sensing as a circuit technique for receiving signal currents on a highly capacitive bus. In bipolar technology, a very commonly used current sensing circuit is known as a common base configuration, which offers low input impedance at the emitter and high output impedance at the collector. This configuration would be an ideal solution, for example, in a complimentary metal oxide semiconductor (CMOS), dynamic random access memory (DRAM) for input/output (I/O) bus sensing. However, in a CMOS designed DRAM, the desired vertical NPN bipolar device, having high gain and low terminal resistances, previously did not exist without additional complexity and cost.
An example of a conventional CMOS circuit of this type is discussed in a paper entitled xe2x80x9cA 1.5V Circuit Technology for 64 Mb DRAM""Sxe2x80x9d presented at the 1990 Symposium on VLSI Circuits, incorporated herein by reference. The CMOS circuit provides the desired advantage of low input impedance and high output impedance, but this is accomplished with undesired higher circuit complexity, higher current consumption and poorer performance.
Therefore, there is a need for a bipolar current sensing device having high gain and low terminal resistances that operates at relatively low power and high performance in the presence of high bus capacitance.
In view of the foregoing and other problems of the conventional methods, it is, therefore, an object of the present invention to provide a structure for a current sensing circuit connected to a power supply terminal and having at least one input terminal and at least one output terminal. The current sensing circuit includes at least one bipolar transistor having a base, emitter and collector, at least one current mirror amplifier connected to the power supply terminal, the current mirror amplifier having an input connected to the collector and having at least one output connected to the emitter, and a DC voltage source connected to the base.
The input terminal is connected to emitter and the output terminal is connected to the collector. The DC voltage source can be a reference voltage or the power supply terminal. The current mirror amplifier comprises at least two metal oxide semiconductor transistors. The output terminal is adapted to drive a metal oxide semiconductor current mirror current source.
The invention also includes a method of manufacturing a bipolar device in a dynamic random access memory (DRAM) manufacturing process, that includes implanting a first-type dopant in a collector layer in a substrate (the implanting of the first-type dopant in the collector layer is performed simultaneously with implanting the first-type dopant in a trench plate layer in the DRAM manufacturing process), implanting a second-type dopant in a base layer in the substrate, the base layer being above the collector layer (wherein the implanting of the second-type dopant in the base layer is performed simultaneously with implanting the second-type dopant in a surface layer in the DRAM manufacturing process), forming conductive connections to the collector layer and the base layer (wherein the forming of the conductive connections is performed simultaneously with forming support device connections in the DRAM manufacturing process), forming a conductive stud having the first-type impurity above an emitter region in the base layer (wherein the forming of the conductive stud is performed simultaneously with forming a bit line stud in the DRAM manufacturing process), and annealing the structure to diffuse the first-type impurity into the emitter region (wherein the annealing is performed simultaneously with an annealing process in the DRAM manufacturing process).
The forming of the conductive stud comprises forming a mask over the substrate, the mask including an opening over the emitter region and depositing doped polysilicon in the opening. The conductive stud reduces a terminal resistance of the bipolar device. The first-type dopant comprises an N-type dopant, the second-type dopant comprises a P-type dopant and t bipolar device comprises a vertical NPN bipolar device.